MAKE(1)                     General Commands Manual                    MAKE(1)


     make - maintain program dependencies


     make [-BeiknpqrSst] [-C directory] [-D variable] [-d flags] [-f mk]
          [-I directory] [-j max_processes] [-m directory] [-V variable]
          [NAME=value] [target ...]


     make is a program designed to simplify the maintenance of other programs.
     Its input is a makefile: a list of specifications (target rules)
     describing build relationships between programs and other files.  By
     default, the file makefile is used; if no such file is found, it tries
     Makefile.  If neither of these exist, make can still rely on a set of
     built-in system rules.

     If the file `.depend' exists, it will also be read after the main
     makefile (see mkdep(1)).

     The handling of `.depend' is a BSD extension.

     Standard options are as follows:

     -e      Environment variables override macro assignments within

     -f mk   Read file mk instead of the default makefile.  If mk is `-',
             standard input is used.  Multiple makefiles may be specified, and
             are read in the order specified.

     -i      Ignore non-zero exit of shell commands in the makefile.
             Equivalent to specifying `-' before each command line in the

     -k      Continue processing after errors are encountered, but only on
             those targets that do not depend on the target whose creation
             caused the error.

     -n      Display the commands that would have been executed, but do not
             actually execute them.

     -p      Print a dump of the target rules and variables on stdout.  Do not
             build anything.

     -q      Do not execute any commands, but exit with status 0 if the
             specified targets are up-to-date, and 1 otherwise.

     -r      Do not use the built-in rules specified in the system makefile,

     -S      Stop processing when an error is encountered.  This is the
             default behavior.  This is needed to negate the -k option during
             recursive builds.

     -s      Do not echo commands as they are executed.  Equivalent to
             specifying `@' before each command line in the makefile.

     -t      Rather than re-building a target as specified in the makefile,
             create it or update its modification time to make it appear up-
             to-date, a bit like touch(1).

             Set the value of the variable NAME to value.

     Extended options are as follows:

     -B      Try to be backwards compatible by executing the commands to make
             the prerequisites in a target rule in sequence.  This is the
             default, in the absence of -j max_processes.

     -C directory
             Enter directory before doing anything.

     -D variable
             Define variable to be 1.

     -d flags
             Turn on debugging, and specify which portions of make are to
             print debugging information.  flags is one or more of the

             A       Print all possible debugging information; equivalent to
                     specifying all of the debugging flags.

             a       Print debugging information about archive searching and

             c       Print debugging information about conditional evaluation.

             d       Print debugging information about directory searching and

             D       Print warning messages about multiply defined command

             e       Print debugging information about expensive command

             f       Print debugging information about the expansion of for

             g1      Print the input graph before making anything.

             g2      Print the input graph after making everything, or before
                     exiting on error.

             h       Print information about jobs being held back because of
                     sibling/target groups races.

             j       Print debugging information about forking processes to
                     run commands.

             k       Print debugging information about manually killing

             l       Print commands in Makefile targets regardless of whether
                     or not they are prefixed by @.  Also known as loud

             m       Print debugging information about making targets,
                     including modification dates.

             n       Print debugging information about target names
                     equivalence computations.

             p       Help finding concurrency issues for parallel make by
                     adding some randomization.  If RANDOM_ORDER is defined,
                     targets will be shuffled before being built.  If
                     RANDOM_DELAY is defined, make will wait between 0 and
                     ${RANDOM_DELAY} seconds before starting a command.  A
                     given random seed can be forced by setting RANDOM_SEED,
                     but this does not guarantee reproductibility.

             q       `quick death' option: after a fatal error, instead of
                     waiting for other jobs to die, kill them right away.

             s       Print debugging information about inference (suffix)
                     transformation rules.

             t       Print debugging information about target list

             T       Print debugging information about target group

             v       Print debugging information about variable assignment.

     -I directory
             Specify a directory in which to search for makefiles and for
             "..."-style inclusions.  Multiple directories can be added to
             form a search path.  Furthermore, the system include path (see
             the -m option) will be used after this search path.

     -j max_processes
             Specify the maximum number of processes that make may have
             running at any one time.

     -m directory
             Specify a directory in which to search for system include files:
    and <...>-style inclusions.  Multiple directories can be
             added to form the system search path.  Using -m will override the
             default system include directory /usr/share/mk.

     -V variable
             Print make's idea of the value of variable.  Do not build any
             targets.  Multiple instances of this option may be specified; the
             variables will be printed one per line, with a blank line for
             each null or undefined variable.

     There are seven different types of lines in a makefile: dependency lines,
     shell commands, variable assignments, include statements, conditional
     directives, for loops, and comments.  Of these, include statements,
     conditional directives and for loops are extensions.

     A complete target rule is composed of a dependency line, followed by a
     list of shell commands.

     In general, lines may be continued from one line to the next by ending
     them with a backslash (`\').  The trailing newline character and initial
     whitespace on the following line are compressed into a single space.


     Dependency lines consist of one or more targets, an operator, and zero or
     more prerequisites:

           target ...:[prerequisite ...]

     This creates a relationship where the targets ``depend'' on the
     prerequisites and are usually built from them.  The exact relationship
     between targets and prerequisites is determined by the operator that
     separates them.

     It is an error to use different dependency operators for the same target.

     The operators are as follows:

     :     A target is considered out-of-date if any of its prerequisites has
           been modified more recently than the target (that is, its
           modification time is less than that of any of its prerequisites).
           Thus, targets with no prerequisites are always out-of-date.

           make will then execute the list of shell commands associated with
           that target.

           Additional prerequisites may be specified over additional
           dependency lines: make will consider all prerequisites for
           determining out-of-date status.  The target is removed if make is

     !     make first examines all prerequisites and re-creates them as

           It will then always execute the list of shell commands associated
           with that target (as if the target always was out-of-date).

           Like :, additional prerequisites may be specified over additional
           dependency lines, and the target is still removed if make is

     ::    Each dependency line for a target is considered independently.  A
           target is considered out-of-date for this target rule if any of its
           prerequisites in this dependency has been modified more recently
           than the target.

           make will then execute the list of shell commands associated with
           that target.  Target rules that specify no prerequisites are always

           The target will not be removed if make is interrupted.

     The : operator is the only standard operator.  The :: operator is a
     fairly standard extension, popularized by imake.  The ! operator is a BSD

     As an extension, targets and prerequisites may contain the shell wildcard
     expressions `?', `*', `[]' and `{}'.  The expressions `?', `*' and `[]'
     may only be used as part of the final component of the target or
     prerequisite, and must be used to describe existing files.  The
     expression `{}' need not necessarily be used to describe existing files.
     Expansion is in directory order, not alphabetically as done in the shell.

     For maximum portability, target names should only consist of periods,
     underscores, digits and alphabetic characters.

     The use of several targets can be a shorthand for duplicate rules.

           target1 target2: reqa reqa

     may be replaced with

           target1: reqa reqa
           target2: reqa reqa

     in general.  But make is aware of parallel issues, and will not build
     those targets concurrently, if not appropriate.


     Each target may have associated with it a series of shell commands,
     normally used to build the target.  While several dependency lines may
     name the same target, only one of these dependency lines should be
     followed by shell commands, and thus define a complete target rule
     (unless the `::' operator is used).  Each of the shell commands in the
     target rule must be preceded by a tab.

     If a command line begins with a combination of the characters, `@', `-'
     and/or `+', the command is treated specially:

     `@'  causes the command not to be echoed before it is executed.

     `-'  causes any non-zero exit status of the command line to be ignored.

     `+'  causes the command to be executed even if -n has been specified.
          (This can be useful to debug recursive Makefiles.)

     Commands are executed using /bin/sh in "set -e" mode, unless `-' is

     As an optimization, make may execute very simple commands without going
     through an extra shell process, as long as this does not change
     observable behavior.


     make also maintains a list of valid suffixes through the use of the
     .SUFFIXES special target.

     These suffixes can be used to write generic transformation rules called
     inference rules.

     If a target has the form `.s1.s2', where .s1 and .s2 are currently valid
     suffixes, then it defines a transformation from *.s1 to *.s2 (double
     suffix inference).  If a target has the form `.s1', where .s1 is a
     currently valid suffix, then it defines a transformation from *.s1 to *
     (single suffix inference).

     A complete inference rule is a dependency line with such a target, the
     normal dependency operator, no prerequisites and a list of shell

     When make requires a target for which it has no complete target rule, it
     will try to apply a single active inference rule to create the target.

     For instance, with the following Makefile, describing a C program
     compiled from sources a.c and b.c, with header file a.h:

           .SUFFIXES: .c .o
                   ${CC} ${CFLAGS} -c $<

           prog: a.o b.o
                   ${CC} ${CFLAGS} -o $@ a.o

           a.o b.o: a.h

           b.o: b.c
                   ${CC} -DFOO ${CFLAGS} -o $@ $<

     Consider b.o: there is a complete target rule re-creating it from b.c, so
     it will be compiled using ${CC} -DFOO.

     Consider a.o: there is no explicit target rule, so make will consider
     valid transforms.  Fortunately, there is an inference rule that can
     create a.o from a.c, so it will be compiled using ${CC}.

     Note that extra prerequisites are still taken into account, so both a.o
     and b.o depend on a.h for re-creation.

     Valid suffixes accumulate over .SUFFIXES lines.  An empty .SUFFIXES can
     be used to reset the currently valid list of suffixes, but inference
     rules already read are still known by make, and they are marked as
     inactive.  Redefining the corresponding suffix (or suffixes) will
     reactivate the rule.

     In case of duplicate inference rules with the same suffix combination,
     the new rule overrides the old one.

     For maximal portability, suffixes should start with a dot.


     Variables in make are much like variables in the shell and, by tradition,
     consist of all upper-case letters.  They are also called `macros' in
     various texts.  For portability, only periods, underscores, digits and
     letters should be used for variable names.  The five operators that can
     be used to assign values to variables are as follows:

     =       Assign the value to the variable.  Any previous value is

     :=      Assign with expansion, i.e., expand the value before assigning it
             to the variable (extension).

     +=      Append the value to the current value of the variable

     ?=      Assign the value to the variable if it is not already defined
             (BSD extension).  Normally, expansion is not done until the
             variable is referenced.

     !=      Expand the value and pass it to the shell for execution and
             assign the result to the variable.  Any newlines in the result
             are replaced with spaces (BSD extension).

     Any whitespace before the assigned value is removed; if the value is
     being appended, a single space is inserted between the previous contents
     of the variable and the appended value.

     Several extended assignment operators may be combined together.  For

           A ?!= cmd

     will only run "cmd" and put its output into A if A is not yet defined.

     Variables are expanded by surrounding the variable name with either curly
     braces (`{}') or parentheses (`()') and preceding it with a dollar sign
     (`$').  If the variable name contains only a single letter, the
     surrounding braces or parentheses are not required.  This shorter form is
     not recommended.

     Variable substitution occurs at two distinct times, depending on where
     the variable is being used.  Variables in dependency lines are expanded
     as the line is read.  Variables in shell commands are expanded when the
     shell command is executed.

     The four different classes of variables (in order of increasing
     precedence) are:

     Environment variables
             Variables defined as part of make's environment.

     Global variables
             Variables defined in the makefile or in included makefiles.

     Command line variables
             Variables defined as part of the command line.

     Local variables
             Variables that are defined specific to a certain target.
             Standard local variables are as follows:

             @         The name of the target.

             %         The name of the archive member (only valid for library

             !         The name of the archive file (only valid for library

             ?         The list of prerequisites for this target that were
                       deemed out-of-date.

             <         The name of the prerequisite from which this target is
                       to be built, if a valid inference rule (suffix rule) is
                       in scope.

             *         The file prefix of the file, containing only the file
                       portion, no suffix or preceding directory components.

             The six variables `@F', `@D', `<F', `<D', `*F', and `*D' yield
             the "filename" and "directory" parts of the corresponding macros.

             For maximum compatibility, `<' should only be used for actual
             inference rules.  It is also set for normal target rules when
             there is an inference rule that matches the current target and
             prerequisite in scope.  That is, in

                   .SUFFIXES: .c .o
                   file.o: file.c
                           cmd1 $<


             building file.o will execute "cmd1 file.c".

             As an extension, make supports the following local variables:

             >         The list of all prerequisites for this target.

             .ALLSRC   Synonym for `>'.

             .ARCHIVE  Synonym for `!'.

             .IMPSRC   Synonym for `<'.

             .MEMBER   Synonym for `%'.

             .OODATE   Synonym for `?'.

             .PREFIX   Synonym for `*'.

             .TARGET   Synonym for `@'.

             These variables may be used on the dependency half of dependency
             lines, when they make sense.

     In addition, make sets or knows about the following internal variables,
     or environment variables:

     $          A single dollar sign `$', i.e., `$$' expands to a single
                dollar sign.

     .MAKE      The name that make was executed with (argv[0]).

     .CURDIR    A path to the directory where make was executed.

     .OBJDIR    Path to the directory where targets are built.  At startup,
                make searches for an alternate directory to place target
                files.  make tries to chdir(2) into MAKEOBJDIR (or obj if
                MAKEOBJDIR is not defined), and sets .OBJDIR accordingly.
                Should that fail, .OBJDIR is set to .CURDIR.

                The list of files read by make.

                The environment variable MAKEFLAGS may contain anything that
                may be specified on make's command line.  Its contents are
                stored in make's .MAKEFLAGS variable.  Anything specified on
                make's command line is appended to the .MAKEFLAGS variable
                which is then entered into the environment as MAKEFLAGS for
                all programs which make executes.

     MFLAGS     A shorter synonym for .MAKEFLAGS.

     PWD        Alternate path to the current directory.  make normally sets
                `.CURDIR' to the canonical path given by getcwd(3).  However,
                if the environment variable PWD is set and gives a path to the
                current directory, then make sets `.CURDIR' to the value of
                PWD instead.  PWD is always set to the value of `.OBJDIR' for
                all programs which make executes.

     .TARGETS   List of targets make is currently building.

     MACHINE    Name of the machine architecture make is running on, obtained
                from the MACHINE environment variable, or through uname(3) if
                not defined.

                Name of the machine architecture make was compiled for,
                obtained from the MACHINE_ARCH environment variable, or
                defined at compilation time.

                Name of the machine processor make was compiled for, obtained
                from the MACHINE_CPU environment variable, or defined at
                compilation time.  On processors where only one endianness is
                possible, the value of this variable is always the same as

     MAKEFILE   Possibly the file name of the last makefile that has been
                read.  It should not be used; see the BUGS section below.

     Variable expansion may be modified to select or modify each word of the
     variable (where ``word'' is a whitespace delimited sequence of
     characters).  The general format of a variable expansion is as follows:


     Each modifier begins with a colon and one of the following special
     characters.  The colon may be escaped with a backslash (`\').

     :E      Replaces each word in the variable with its suffix.

     :H      Replaces each word in the variable with everything but the last

     :L      Replaces each word in the variable with its lower case

     :U      Replaces each word in the variable with its upper case

             Select only those words that match the rest of the modifier.  The
             standard shell wildcard characters (`*', `?', and `[]') may be
             used.  The wildcard characters may be escaped with a backslash

             This is identical to :M, but selects all words which do not match
             the rest of the modifier.

     :Q      Quotes every shell meta-character in the variable, so that it can
             be passed safely through recursive invocations of make.

     :QL     Quote list: quotes every shell meta-character in the variable,
             except whitespace, so that it can be passed to a shell's `for'

     :R      Replaces each word in the variable with everything but its

             Modify the first occurrence of old_string in the variable's
             value, replacing it with new_string.  If a `g' is appended to the
             last slash of the pattern, all occurrences in each word are
             replaced.  If a `1' is appended to the last slash of the pattern,
             only the first word is affected.  If old_string begins with a
             caret (`^'), old_string is anchored at the beginning of each
             word.  If old_string ends with a dollar sign (`$'), it is
             anchored at the end of each word.  Inside new_string, an
             ampersand (`&') is replaced by old_string (without any `^' or
             `$').  Any character may be used as a delimiter for the parts of
             the modifier string.  The anchoring, ampersand and delimiter
             characters may be escaped with a backslash (`\').

             Variable expansion occurs in the normal fashion inside both
             old_string and new_string with the single exception that a
             backslash is used to prevent the expansion of a dollar sign
             (`$'), not a preceding dollar sign as is usual.

             The :C modifier is just like the :S modifier except that the old
             and new strings, instead of being simple strings, are an extended
             regular expression (see re_format(7)) and an ed(1)-style
             replacement string.  Normally, the first occurrence of the
             pattern in each word of the value is changed.  The `1' modifier
             causes the substitution to apply to at most one word; the `g'
             modifier causes the substitution to apply to as many instances of
             the search pattern as occur in the word or words it is found in.
             Note that `1' and `g' are orthogonal; the former specifies
             whether multiple words are potentially affected, the latter
             whether multiple substitutions can potentially occur within each
             affected word.

     :T      Replaces each word in the variable with its last component.

             This is the AT&T System V UNIX style variable substitution.  It
             must be the last modifier specified.  If old_string or new_string
             do not contain the pattern matching character `%' then it is
             assumed that they are anchored at the end of each word, so only
             suffixes or entire words may be replaced.  Otherwise `%' is the
             substring of old_string to be replaced in new_string.  The right
             hand side (new_string) may contain variable values, which will be
             expanded.  To put an actual single dollar, just double it.

     All modifiers are BSD extensions, except for the standard AT&T System V
     UNIX style variable substitution.

     The interpretation of `%' and `$' in AT&T System V UNIX variable
     substitutions is not mandated by POSIX, though it is fairly common.


     Makefile inclusion, conditional structures and for loops reminiscent of
     the C programming language are provided in make.  All such structures are
     identified by a line beginning with a single dot (`.') character.
     Whitespace characters may follow this dot, e.g.,

           .include <file>
           .   include <file>

     are identical constructs.  Files are included with either `.include
     <file>' or `.include "file"'.  Variables between the angle brackets or
     double quotes are expanded to form the file name.  If angle brackets are
     used, the included makefile is expected to be in the system makefile
     directory.  If double quotes are used, the including makefile's directory
     and any directories specified using the -I option are searched before the
     system makefile directory.

     Conditional expressions are also preceded by a single dot as the first
     character of a line.  The possible conditionals are as follows:

     .undef variable
             Un-define the specified global variable.  Only global variables
             may be un-defined.

     .poison variable
             Poison the specified global variable.  Any further reference to
             variable will be flagged as an error.

     .poison !defined (variable)
             It is an error to try to use the value of variable in a context
             where it is not defined.

     .poison empty (variable)
             It is an error to try to use the value of variable in a context
             where it is not defined or empty.

     .if [!]expression [operator expression ...]
             Test the value of an expression.

     .ifdef [!]variable [operator variable ...]
             Test the value of a variable.

     .ifndef [!]variable [operator variable ...]
             Test the value of a variable.

     .ifmake [!]target [operator target ...]
             Test the target being built.

     .ifnmake [!] target [operator target ...]
             Test the target being built.

     .else   Reverse the sense of the last conditional.

     .elif [!] expression [operator expression ...]
             A combination of `.else' followed by `.if'.

     .elifdef [!]variable [operator variable ...]
             A combination of `.else' followed by `.ifdef'.

     .elifndef [!]variable [operator variable ...]
             A combination of `.else' followed by `.ifndef'.

     .elifmake [!]target [operator target ...]
             A combination of `.else' followed by `.ifmake'.

     .elifnmake [!]target [operator target ...]
             A combination of `.else' followed by `.ifnmake'.

     .endif  End the body of the conditional.

     The operator may be any one of the following:

     ||     logical OR

     &&     Logical AND; of higher precedence than ||.

     As in C, make will only evaluate a conditional as far as is necessary to
     determine its value.  Parentheses may be used to change the order of
     evaluation.  The boolean operator `!' may be used to logically negate an
     entire conditional.  It is of higher precedence than `&&'.

     The value of expression may be any of the following:

     commands  Takes a target name as an argument and evaluates to true if the
               target has been defined and has shell commands associated with

     defined   Takes a variable name as an argument and evaluates to true if
               the variable has been defined.

     make      Takes a target name as an argument and evaluates to true if the
               target was specified as part of make's command line or was
               declared the default target (either implicitly or explicitly,
               see .MAIN) before the line containing the conditional.

     empty     Takes a variable, with possible modifiers, and evaluates to
               true if the expansion of the variable would result in an empty

     exists    Takes a file name as an argument and evaluates to true if the
               file exists.  The file is searched for on the system search
               path (see .PATH).

     target    Takes a target name as an argument and evaluates to true if the
               target has been defined.

     expression may also be an arithmetic or string comparison.  Variable
     expansion is performed on both sides of the comparison, after which the
     integral values are compared.  A value is interpreted as hexadecimal if
     it is preceded by 0x, otherwise it is decimal; octal numbers are not
     supported.  The standard C relational operators are all supported.  If
     after variable expansion, either the left or right hand side of a `==' or
     `!=' operator is not an integral value, then string comparison is
     performed between the expanded variables.  If no relational operator is
     given, it is assumed that the expanded variable is being compared against

     When make is evaluating one of these conditional expressions, and it
     encounters a word it doesn't recognize, either the ``make'' or
     ``defined'' expression is applied to it, depending on the form of the
     conditional.  If the form is `.ifdef' or `.ifndef', the ``defined''
     expression is applied.  Similarly, if the form is `.ifmake' or
     `.ifnmake', the ``make'' expression is applied.

     If the conditional evaluates to true the parsing of the makefile
     continues as before.  If it evaluates to false, the following lines are
     skipped.  In both cases this continues until a `.else' or `.endif' is

     For loops are typically used to apply a set of rules to a list of files.
     The syntax of a for loop is:

           .for variable [variable ...] in expression

     After the for expression is evaluated, it is split into words.  On each
     iteration of the loop, one word is assigned to each variable, in order,
     and these variables are substituted in the make-rules inside the body of
     the for loop.  The number of words must match the number of iteration
     variables; that is, if there are three iteration variables, the number of
     words must be a multiple of three.

     Loops and conditional expressions may nest arbitrarily, but they may not
     cross include file boundaries.

     make also supports sinclude and -include for compatibility with other
     implementations.  Both use the same syntax:

           sinclude file
           -include file

     (note no quotes around file) and will include file, but without any error
     if it does not exist.


     Comments begin with a hash (`#') character, anywhere but in a shell
     command line, and continue to the end of the line (but a (`#') character
     in a shell command line will be interpreted as a comment by the shell).


     Some targets may be tagged with some specific attributes by one of the

     ``Always build''
                      Run the commands associated with this target even if the
                      -n or -t options were specified.  Can be used to mark
                      recursive make's, but prefer standard `+cmd'.

     ``Cheap''        In parallel mode, don't scan the commands for
                      occurrences of make, thus letting normal recursive -j
                      behavior apply.

     ``Expensive''    In parallel mode, assume commands will invoke recursive
                      commands.  Once make starts building an expensive
                      target, it won't start building anything else until that
                      target has finished building.

     ``Ignoring errors''
                      Ignore any errors generating by running shell commands,
                      exactly as if they were all preceded by a dash (`-').

     ``Phony''        A phony target is a target that does not correspond to
                      any object in the file system (more like a placeholder
                      for a list of commands).

                      Phony targets are always out-of-date at the start of a
                      run, but make still keeps track of when they are built
                      (that is, when the associated command list finishes

     ``Precious''     Don't remove the target if make is interrupted in the
                      middle of building it.

     ``Silent''       Do not display shell commands before running them,
                      exactly as if they were all preceded by a `@'.


     make recognizes standard special targets:

     .DEFAULT      If there is a .DEFAULT target rule, with commands but no
                   prequisites, and make can't figure out another way to build
                   a target, it will use that list of commands, setting < and
                   @ appropriately.

     .IGNORE       Mark its prerequisites as ``Ignoring errors''.

                   If the list of prerequisites is empty, apply that to all
                   targets, exactly like the -i command-line option.

     .PRECIOUS     Mark its prerequisites as ``Precious''.

                   If the list of prerequisites is empty, apply that to all

     .SILENT       Mark its prerequisites as ``Silent''.

                   If the list of prerequisites is empty, apply that to all
                   targets, exactly like the -s command-line option.


     and also some other special targets as an extension:

     .BEGIN        Command lines attached to this target are executed before
                   anything else is done.

     .CHEAP        Mark its prerequisites as ``Cheap''.

     .END          Command lines attached to this target are executed at the
                   end of a successful run.

     .EXPENSIVE    Mark its prerequisites as ``Expensive''.

     .INTERRUPT    Command lines attached to this target are executed if make
                   is interrupted by a SIGINT.

     .MADE         Mark its prerequisites as being up-to-date.

     .MAKE         Mark its prerequisites as ``Always build''.  Prefer
                   standard `+cmd'.

     .MAIN         If no target is specified when make is invoked, this target
                   will be built.  This is always set, either explicitly, or
                   implicitly when make selects the default target, to give
                   the user a way to refer to the default target on the
                   command line.

     .MAKEFLAGS    This target provides a way to specify flags for make when
                   the makefile is used.  The flags are as if typed to the
                   shell, though the -f option will have no effect.

     .NOTPARALLEL  Disable parallel mode for the current makefile.  The -j
                   option is still passed to submakes.

     .NO_PARALLEL  Same as above, for compatibility with other pmake variants.

     .ORDER        The list of prerequisites should be built in sequence.

     .PATH         The prerequisites define a search path: directories that
                   will be searched for files not found in the current
                   directory.  If no prerequisites are specified, any
                   previously specified directories are deleted.

     .PATH.suffix  This target is only valid if .suffix is a currently valid
                   suffix.  The prerequisites defines a search path for files
                   ending in that suffix.  For files not found in the current
                   directory, make will first look in that path, before
                   reverting to the default search path.

     .PHONY        Mark its prerequisites as ``Phony'' targets.

     It is an error to use several special targets, or a special target and
     normal targets, in a single dependency line.


     Of the special targets described in the previous section, the ones that
     tag prerequisites can also be used as prerequisites, in which case the
     corresponding targets will be tagged accordingly.

     This is an extension, even for standard special targets.

     make also recognizes some other prerequisites:

     .NOTMAIN   Normally make selects the first target it encounters as the
                default target to be built if no target was specified.  This
                prerequisite prevents this target from being selected.

     .OPTIONAL  If a target is marked with this attribute and make can't
                figure out how to create it, it will ignore this fact and
                assume the file isn't needed or already exists.

     .USE       Turn the target into make's version of a macro.  When the
                target is used as a prerequisite for another target, the other
                target acquires the commands, prerequisites, and attributes
                (except for .USE) of the prerequisite.  If the target already
                has commands, the .USE target's commands are appended to them.

     .WAIT      If .WAIT appears in a dependency line, the prerequisites that
                precede it are made before the prerequisites that follow it in
                the line.  Loops are not detected and targets that form loops
                will be silently ignored.


     make uses the following environment variables, if they exist: MACHINE,
     PWD.  make also ignores and unsets CDPATH.


     .depend        list of dependencies
     makefile       default makefile
     Makefile       default makefile if makefile does not exist         system makefile
     /usr/share/mk  system makefile directory
     /usr/obj       default MAKEOBJDIRPREFIX directory


     If -q was specified, the make utility exits with one of the following

           0       Normal behavior.
           1       The target was not up-to date.
           >1      An error occurred.

     Otherwise, the make utility exits with a value of 0 on success, and >0 if
     an error occurred.


     ed(1), mkdep(1), sh(1), getcwd(3), uname(3), re_format(7)


     The make utility is mostly compliant with the IEEE Std 1003.1-2008
     (``POSIX.1'') specification, though its presence is optional.

     The flags [-BCDdIjmV] are extensions to that specification.

     Older versions of make used MAKE instead of MAKEFLAGS.  This was removed
     for POSIX compatibility.  The internal variable MAKE is set to the same
     value as .MAKE.  Support for this may be removed in the future.

     Most of the more esoteric features of make should probably be avoided for
     greater compatibility.


     A make command appeared in Version 7 AT&T UNIX.

     This implementation is a distant derivative of pmake, originally written
     by Adam de Boor.


     If the same target is specified several times in complete target rules,
     make silently ignores all commands after the first non empty set of
     commands, e.g., in

                   @echo "Executed"
                   @echo "Bad luck"

     @echo "Bad luck" will be ignored.

     .TARGETS is not set to the default target when make is invoked without a
     target name and no MAIN special target exists.

     The evaluation of expression in a test is somewhat simplistic.  Variables
     don't need to be quoted, but strings do: Tests like `.if ${VAR} ==
     string', `.if ${VAR} >= 5', `.if 5 <= 10', and `.if string == ${VAR}' do
     work, but `.if string = ${VAR}' doesn't.

     For loops are expanded before tests, so a fragment such as:

           .for TMACHINE in ${SHARED_ARCHS}
           .if "${TMACHINE}" == ${MACHINE}

     requires the quotes.

     When handling pre-4.4BSD archives, make may erroneously mark archive
     members as out of date if the archive name was truncated.

     The handling of `;' and other special characters in tests may be utterly
     bogus.  For instance, in

           .if ${A:R} == "abcd;c"

     the test will never match, even though the value is correct.

     In a .for loop, only the variable value is used; assignments will be
     evaluated later, e.g., in

           .for I in a b c d

     `A' will evaluate to a b c d after the loop, not z b c d.

     ORDER is currently only used in parallel mode, so keep prerequisites
     ordered for sequential mode!

     Distinct target names are treated separately, even though they might
     correspond to the same file in the file system.  This can cause excessive
     rebuilds of some targets, and bogus races in parallel mode.  This can
     also prevent make from finding a rule to solve a dependency if the target
     name is not exactly the same as the dependency.

     In parallel mode, -j n only limits the number of direct children of make.
     During recursive invocations, each level may multiply the total number of
     processes by n.  However, make includes some heuristics to try to prevent
     catastrophic behavior: if a command is marked as expensive, or preceded
     by `+', or seems to invoke a program that looks sufficiently like `make',
     make will assume recursive invocation, and not start any new process
     until said command has finished running.  Thus the number of processes
     run directly or indirectly by make will increase linearly with each level
     of recursion instead of exponentially.

     The MAKEFILE variable cannot be used reliably.  It is a compatibility
     feature and may get set to the last makefile specified, as it is set by
     System V make.

OpenBSD 5.9                     March 13, 2015                     OpenBSD 5.9

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